(Hong Kong)
Product Summary
The ISPLSI2064VE100LT100 is a High Density Programmable Logic Device. The device contains 64 Registers, 64 Universal I/O pins, four Dedicated Input Pins, three Dedicated Clock Input Pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ISPLSI2064VE100LT100 features 5V in-system programmability and in-system diagnostic capabilities. The ISPLSI2064VE100LT100 offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.
Parametrics
ISPLSI2064VE100LT100 absolute maximum ratings: (1)Supply Voltage Vcc: -0.5 to +7.0V; (2)Input Voltage Applied: -2.5 to VCC +1.0V; (3)Off-State Output Voltage Applied: -2.5 to VCC +1.0V; (4)Storage Temperature: -65 to 150℃; (5)Case Temp. with Power Applied: -55 to 125℃; (6)Max. Junction Temp. (TJ) with Power Applied: 150℃.
Features
ISPLSI2064VE100LT100 features: (1)2000 PLD Gates; (2)64 I/O Pins, Four Dedicated Inputs; (3)64 Registers; (4)High Speed Global Interconnect; (5)Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc; (6)Small Logic Block Size for Random Logic; (7)100% Functionally and JEDEC Upward Compatible with ispLSI 2064 Devices.
Diagrams
 |
 ISPL1048E-50LQ. |
Other |
|
Data Sheet |
Negotiable |
|
||||||||
|
ispLSi 1016 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||
|
ispLSI 1016-110LJ |
Lattice |
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
Data Sheet |
|
|
||||||||
|
ispLSI 1016-60LJ |
Lattice |
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
Data Sheet |
|
|
||||||||
|
ispLSI 1016-60LJI |
Lattice |
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
Data Sheet |
|
|
||||||||
|
ispLSI 1016-60LT44 |
Lattice |
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
Data Sheet |
|
|
||||||||
